cache: include asm/cache.h for ARCH_DMA_MINALIGN definition

ARCH_DMA_MINALIGN will be used to allocate DMA buffers that are
aligned correctly.  In all current cases this means that the DMA
buffer will be aligned to at least the L1 data cache line size of
the configured architecture.  If the board configuration file
does not specify the architecture L1 data cache line size then the
maximum line size of the architecture is used to align DMA buffers.

Signed-off-by: Anton Staaf <[email protected]>
Cc: Mike Frysinger <[email protected]>
Cc: Lukasz Majewski <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Ilya Yanok <[email protected]>
Cc: Laurence Withers <[email protected]>

diff --git a/include/common.h b/include/common.h
index ccd3dd785af7bba27808838424f61e7c5c56f132..db1c7d0f51356f6d388560adbfdff47db2ce5d02 100644 (file)
--- a/include/common.h
+++ b/include/common.h
@@ -834,6 +834,14 @@ int cpu_release(int nr, int argc, char * const argv[]);
 #define ALIGN(x,a)             __ALIGN_MASK((x),(typeof(x))(a)-1)
 #define __ALIGN_MASK(x,mask)   (((x)+(mask))&~(mask))
 
+/*
+ * ARCH_DMA_MINALIGN is defined in asm/cache.h for each architecture.  It
+ * is used to align DMA buffers.
+ */
+#ifndef __ASSEMBLY__
+#include <asm/cache.h>
+#endif
+
 /* Pull in stuff for the build system */
 #ifdef DO_DEPS_ONLY
 # include <environment.h>